1. Field of the Invention
This disclosure relates to a semiconductor device and a method of packaging the same. More particularly, this disclosure relates to a semiconductor-chip mounting body, on which a semiconductor chip is mounted as a flip-chip type to be connected to and encapsulated on the mounting body, a semiconductor device including the mounting body, and a method of packaging the semiconductor device.
2. Description of the Related Art
A semiconductor packaging process is performed to electrically connect a semiconductor chip to external elements and also protect the semiconductor chip from the outside environment. To attain these objects, conventional packaging processes include a connection process and an encapsulation process. However, in recent years, as more electric appliances employ semiconductor devices and semiconductor chips become more varied in size, shape, and performance, new methods of packaging semiconductor chips, including the connection and encapsulation processes, have been developed.
Nowadays, there are various and broadly used packages for densely mounting semiconductor chips, ranging from a dual inline package (DIP), a small outline package (SOP), a quad flat package (QFP), and a ball grid array (BGA), to a chip scale package (CSP), which is a more upgraded package. In addition, a wafer-level CSP and a technique for direct-chip-attach (DCA) mounting bare chips are being developed in order to make electric appliances thinner, smaller, and lighter.
A flip chip technique has also been developed to enable diversification of appliances and to mount semiconductor chips in a highly dense manner. In a broad sense, the flip chip technique refers to a method of turning a semiconductor chip upside down to make a chip pad opposite to a substrate and electrically and mechanically connect the semiconductor chip with the substrate. In a narrow sense, the flip chip technique refers to a method of packaging bare chips upside down. In this disclosure, the flip chip technique refers to the former, broad sense of the term.
FIG. 1A is a schematic cross-sectional diagram illustrating a conventional mounting body for connecting as a flip-chip type and encapsulating a semiconductor chip.
Referring to FIG. 1A, the conventional mounting body 100 comprises a substrate 110, a conductive pattern 120, and a protection layer 130. The substrate 110 may be formed of various materials in diverse shapes. For example, the substrate 110 may be a typical printed circuit board, a chip-on-glass (COG)-type glass substrate, or a substrate formed of a polyimide film used for tape automated bonding (TAB) or tape carrier package (TCP).
The conductive pattern 120 is disposed on the substrate 110 to electrically connect a bonding pad of a semiconductor chip and an external element. The conductive pattern 120 is typically formed of copper (Cu) but it is also possible to use aluminum (Al) or gold (Au). The shape of the conductive pattern 120 depends on the arrangement of bumps formed on a semiconductor chip to be connected to and mounted on the mounting body and also on the electrical properties of the substrate 110. Since the bumps are normally disposed on both sides of the semiconductor chip, the conductive pattern 120 is not formed in vacancies between the bumps in the center of the top surface of the substrate 110. The vacancies between the bumps will be filled with under-filling material in a subsequent process.
Thereafter, the protection layer 130 is formed on the conductive pattern 120. The protection layer 130 is formed of photo sensitive resist (PSR) or the like. To protect the conductive pattern 120, the protection layer 130 is formed not only on the top surface of the conductive pattern 120 but also on lateral vacancies thereof. However, the protection layer 130 is not formed in a portion of the conductive pattern 120 such that the bumps formed on the semiconductor chip contact the portion of the conductive pattern 120. Thus, the portion of the conductive pattern 120 is exposed.
FIG. 1B is a schematic cross-sectional diagram illustrating a conventional semiconductor device 100′, in which a semiconductor chip 140 is mounted on the mounting body 100 of FIG. 1A. Referring to FIG. 1B, a plurality of bumps 150 are formed on a side of the semiconductor chip 140 where a circuit is formed, i.e., a pad (not shown) is positioned.
Generally, a bump refers to a conductive protrusion used for connecting a semiconductor chip to a substrate or directly connecting the semiconductor chip and a printed circuit board. This bump can increase the height of an electrode so as to aid mounting a flip chip and makes it easier to connect the electrode to an external electrode. Such a bump may be formed in a ball shape or a square pillar shape. The bumps 150 are connected to the conductive pattern 120 through the exposed portion of the conductive pattern 120, which is not protected by the protection layer 130.
Regions where the bumps 150 are connected to the conductive pattern 120 are protected from the outside environment through an encapsulation process. By the encapsulation process, a liquid encapsulation resin 160 encloses the bumps 150 and the exposed conductive pattern 120. Also, the encapsulation resin 160 forms an under-fill at the bottom of the semiconductor chip 140.
The encapsulation resin 160 protects the bumps 150 and adheres the semiconductor chip 140 to the mounting body 100 through the under-fill. Since the liquid encapsulation resin 160 is hardened later, the mounting body 100 and the semiconductor chip 140 can be firmly adhered. However, if the encapsulation resin 160 is not sufficient for adhesion, an additional adhesive may be used.
Embodiments of the invention address these and other limitations of the prior art.